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Computer System Architecture 3/E(International Edition)   
ÁöÀºÀÌ M. MORRIS MANO   |   ÃâÆÇ»ç Prentice Hall  |   ¹ßÇàÀÏ 1999³â 06¿ù 15ÀÏ   |   ¾ð¾î : ¿µ¾î
 
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¹ßÇàÀÏ 1999-06-15
ISBN 0131757385 | 9780131757387
±âŸÁ¤º¸ ¿ø¼­ | 525ÂÊ | $ 100 | Paperback
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COMPUTER SYSTEM ARCHITECTURE 3/E
Prentice Hall I M. MORRIS MANO
 
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ÀÌ Ã¥Àº µðÁöÅ» ÄÄÇ»ÅÍÀÇ Çϵå¿þ¾î ¿¬»êÀ» ÀÌÇØÇϴµ¥ ÇÊ¿äÇÑ ±âº» »çÇ×À» Á¦°øÇϰí ÄÄÇ»ÅÍ Çϵå¿þ¾î¿Í ¿¬°üµÈ ÀÌ·¯ÇÑ ¼¼°³ÀÇ ÁÖÁ¦¸¦ ´Ù·ç°í ÀÖ´Ù.
Chapter One. Digital Logic Circuits
1-1 Digital Computers

1-2 Logic Gates

1-3 Boolean Algebra

1-4 Map Simplification

1-5 Combinational Circuits

1-6 Flip-Flops

1-7 Sequential Circuits

¡¡

Chapter Two. Digital Components

2-1 Ontegrated Circuits

2-2 Decodes

2-3 Multiplexers

2-4 Registers

2-5 Shift Registers

2-6 Binary Counters

2-7 Memory Unit

¡¡

Chapter Three. Data Representation

3-1 Data Types

3-2 Complements

3-3 Fixed-Point Representation

3-4 Floating-Point Representation

3-5 Other Binary Codes

3-6 Error Detection Codes

¡¡

Chapter Four. Register Transfer and Microoperations

4-1 Register Transfer Language

4-2 Register Transfer

4-3 Bus and Memory Transfers

4-4 Arithmetic Microoperations

4-5 Logic Microoperations

4-6 Shift Microoperations

4-7 Arithmetic Logic Shift Unit

¡¡

Chapter Five. Basic Computer Organization and Design

5-1 Instruction Codes

5-2 Computer Registers

5-3 Computer Instructions

5-4 Timing and Control

5-5 Instruction Cycle

5-6 MEmory-Reference Instructions

5-7 Input-Output and Interrupt

5-8 Complete Computer Description

5-9 Design of Basic Computer

5-10 Design of Accumulator Logic

¡¡

Chapter Six. Programming the Basic Computer

6-1 Introduction

6-2 Machine Language

6-3 Assembly Language

6-4 The Assembler

6-5 Program Loops

6-6 Programming Arithmetic and Logic

6-7 Subroutines

6-8 Input-Output Programming

¡¡

Chapter Seven. Microprogrammed Control

7-1 Control Memory

7-2 Address Sequencing

7-3 Microprogram Example

7-4 Design of Control Unit

¡¡

Chapter Eight. Central Processing Unit

8-1 Introduction

8-2 General Register Organization

8-3 Stack Organization

8-4 Instruction Formats

8-5 Addressing Modes

8-6 Data Transfer and Manipulation

8-7 Program Control

8-8 Reduced Instruction Set Computer(RISC)

¡¡

Chapter Nine. Pipeline and Vector Processing

9-1 Parallel Processing

9-2 Pipelining

9-3 Arithmetic Pipeline

9-4 Instruction Pipeline

9-5 RISC Pipeline

9-6 Vector Processing

9-7 Array Processors

¡¡

Chapter Ten. Computer Arithmetic

10-1 Introduction

10-2 Addition and Substraction

10-3 Multiplication Algorithms

10-4 Division Algorithms

10-5 Floating-Point Arithmetic Operations

10-6 Decimal Arithmetic Unit

10-7 Decimal Arithmetic Operations

¡¡

Chapter Eleven. Input-Output Organization

11-1 Peripheral Devices

11-2 Input-Output Interface

11-3 Asynchronous Data Transfer

11-4 Modes of Transfer

11-5 Priority Interrupt

11-6 Direct Memory Access(DMA)

11-7 Input-Output Processor(IOP)

11-8 Serial Communication

¡¡

Chapter Twelve. Memory Organization

12-1 Memory Hiearchy

12-2 Main Memory

12-3 Auxiliary Memory

12-4 Associative Memory

12-5 Cache Memory

12-6 Virtual Memory

12-7 Memory Management Hardware

¡¡

Chapter Thirteen. Multiprocessors

13-1 Characteristics of Multiprocessors

13-2 Interconnection Structures

13-3 Interprocessor Arbitration

13-4 Interprocessor Communication and Synchnonization

13-5 Cache Coherence
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